3. Foundational Components
- 3.1. U-Boot
- 3.1.1. User’s Guide
- 3.1.1.1. General Information
- 3.1.1.2. USB Device Firmware Upgrade (DFU)
- 3.1.1.3. Network (Wired or USB Client)
- 3.1.1.3.1. Booting U-Boot from the network
- 3.1.1.3.2. Multiple Interfaces
- 3.1.1.3.3. Network configuration via DHCP
- 3.1.1.3.4. Manual network configuration
- 3.1.1.3.5. Disabling Gigabit Phy Advertising
- 3.1.1.3.6. Booting Linux from the network
- 3.1.1.3.7. Sample Script for AM65 SR1
- 3.1.1.3.8. Sample Script for AM65 SR2
- 3.1.1.4. NAND
- 3.1.1.5. SD, eMMC and USB
- 3.1.1.5.1. Partitioning eMMC from U-Boot
- 3.1.1.5.2. Updating an SD card from a host PC
- 3.1.1.5.3. Updating an SD card or eMMC using DFU
- 3.1.1.5.4. Booting Linux from SD card or eMMC
- 3.1.1.5.5. Booting tiboot3.bin, tispl.bin and u-boot.img from eMMC boot partition (For K3 class of SoCs)
- 3.1.1.5.6. Booting to U-Boot prompt from USB storage
- 3.1.1.5.7. Booting Linux from USB storage
- 3.1.1.5.8. Steps for working around SD card issues
- 3.1.1.6. SPI
- 3.1.1.7. OSPI/QSPI NOR/NAND
- 3.1.1.8. NOR
- 3.1.1.9. UART
- 3.1.1.10. SATA
- 3.1.1.11. UFS
- 3.1.1.12. DDR3 ECC
- 3.1.1.13. HyperBus and HyperFlash
- 3.1.1.14. RemoteProc
- 3.1.2. Troubleshooting
- 3.1.1. User’s Guide
- 3.2. Boot Monitor
- 3.3. Kernel
- 3.3.1. Users Guide
- 3.3.2. Kernel Release Notes
- 3.3.3. RT Kernel Release Notes
- 3.3.4. Kernel Drivers
- 3.3.4.1. ADC
- 3.3.4.2. Audio
- 3.3.4.3. VPFE
- 3.3.4.4. VIP
- 3.3.4.5. CAL
- 3.3.4.6. Crypto
- 3.3.4.7. MCAN
- 3.3.4.8. DCAN
- 3.3.4.9. DSS
- 3.3.4.10. LCDC
- 3.3.4.11. GPIO
- 3.3.4.12. I2C
- 3.3.4.13. CPSW
- 3.3.4.14. NetCP
- 3.3.4.15. PRUSS
- 3.3.4.16. CPSW2g Ethernet
- 3.3.4.17. PCIe End Point
- 3.3.4.18. PCIe Root Complex
- 3.3.4.19. PWM
- 3.3.4.20. OSPI/QSPI NOR/NAND
- 3.3.4.21. SPI
- 3.3.4.22. SATA
- 3.3.4.23. NAND
- 3.3.4.24. MMC/SD
- 3.3.4.25. UART
- 3.3.4.26. UFS
- 3.3.4.27. USB MUSB
- 3.3.4.28. USB DWC3
- 3.3.4.29. VPE
- 3.3.5. LTP-DDT Validation
- 3.3.6. FAQs
- 3.4. Filesystem
- 3.5. Tools
- 3.6. PRU Subsystem
- 3.6.1. Overview of PRU Subsystem
- 3.6.1.1. Getting Started Information
- 3.6.1.2. Hardware Information
- 3.6.1.3. Training Material
- 3.6.1.4. Development Tools
- 3.6.1.5. Software Information
- 3.6.1.6. Examples
- 3.6.1.7. Evaluation Hardware
- 3.6.1.8. TI Designs
- 3.6.1.9. Support
- 3.6.1.10. PRU FAQ
- 3.6.1.10.1. PRU Applications & Support questions
- 3.6.1.10.1.1. What is the difference between the PRU subsystem and ICSS?
- 3.6.1.10.1.2. Is TI providing libraries for the PRU?
- 3.6.1.10.1.3. Can I develop my own industrial protocols on the PRU-ICSS?
- 3.6.1.10.1.4. Can the PRU run a High Level Operating System?
- 3.6.1.10.1.5. My processor has a PRU. Is the PRU supported in the Linux Processor SDK?
- 3.6.1.10.2. PRU Memory Access questions
- 3.6.1.10.3. PRU GPI/O questions
- 3.6.1.10.3.1. What is the maximum speed for toggling PRU GPO pins via PRU software?
- 3.6.1.10.3.2. When does the PRU start capturing from the input pins?
- 3.6.1.10.3.3. Can the module be modified so that the GPI start bit is a zero instead of a one?
- 3.6.1.10.3.4. What happens after 28 bit GPI shifts?
- 3.6.1.10.3.5. Can data be pre-loaded into shadow registers prior to configuring the PRU GPO mode to shift out mode?
- 3.6.1.10.3.6. When does PRU<n>_CLOCKOUT start running?
- 3.6.1.10.3.7. When does the PRU start shifting data in the shadow registers?
- 3.6.1.10.3.8. The shadow registers are loaded by writing to PRU<n>_R30 [0:15]. Does this change the state of the corresponding device-level pins?
- 3.6.1.10.3.9. When the PRU<n>_ENABLE_SHIFT bit is cleared, does the PRU immediately stop shifting PRU<n>_DATAOUT?
- 3.6.1.10.3.10. Does the PRU shift data out LSB or MSB first?
- 3.6.1.10.3.11. What happens to the content stored in R30 when the PRU changes to a different GPO mode?
- 3.6.1.10.4. PRU INTC and System Event questions
- 3.6.1.10.5. PRU Debugger questions
- 3.6.1.10.1. PRU Applications & Support questions
- 3.6.2. Training
- 3.6.2.1. PRU Getting Started Labs
- 3.6.2.2. Lab 1: How to Create a PRU Project
- 3.6.2.3. Lab 2: How to Write PRU Firmware
- 3.6.2.4. Lab 3: How to Compile PRU Firmware
- 3.6.2.5. Lab 4: How to Initialize the PRU
- 3.6.2.6. Lab 5: Basic Debugging of PRU Firmware
- 3.6.2.7. PRU Hands-on Labs
- 3.6.2.7.1. Lab Configuration
- 3.6.2.7.2. LAB 1: Toggle LED with PRU GPO
- 3.6.2.7.3. LAB 2: Read Push Button Switch on PRU0 GPI & Toggle LED with PRU1 GPO
- 3.6.2.7.4. LAB 3: Temperature Monitor
- 3.6.2.7.5. LAB 4: Introduction to Linux driver
- 3.6.2.7.6. LAB 5: RPMsg Communication between ARM and PRU
- 3.6.2.7.6.1. Build the PRU Firmware - Using CCSv6
- 3.6.2.7.6.2. Build the PRU Firmware - Using the Provided Makefile
- 3.6.2.7.6.3. Build the RPMsg Client Sample Driver
- 3.6.2.7.6.4. Copy files to the target file system
- 3.6.2.7.6.5. Part 1: Kernel space communication
- 3.6.2.7.6.6. What just happened?
- 3.6.2.7.6.7. Part 2: User Space Communication
- 3.6.2.7.6.8. Part 3: User Space Application
- 3.6.2.7.6.9. What just happened?
- 3.6.2.7.7. LAB 6: Blinking LEDs with RPMsg from Linux User Space
- 3.6.2.7.7.1. Build the PRU Firmware - Using CCSv6
- 3.6.2.7.7.2. Build the PRU Firmware - Using the Provided Makefile
- 3.6.2.7.7.3. Copy files to the target file system
- 3.6.2.7.7.4. Part 1: Linux Command Line LED Toggling
- 3.6.2.7.7.5. What just happened?
- 3.6.2.7.7.6. Part 2: Linux Shell Script LED Toggling
- 3.6.2.7.7.7. What just happened?
- 3.6.2.8. Getting Started with PRU Software Support Package
- 3.6.2.9. RPMsg Quick Start Guide
- 3.6.2.9.1. Introduction
- 3.6.2.9.2. Getting the Linux Processor SDK
- 3.6.2.9.3. Configuring and Building the Linux Kernel with RPMsg Support
- 3.6.2.9.4. Creating a Bootable SD Card with RPMsg Support
- 3.6.2.9.5. Booting the Board and Testing RPMsg
- 3.6.2.9.6. Getting Started with RPMsg Development
- 3.6.2.9.7. Common Issues
- 3.6.3. Linux Drivers
- 3.6.3.1. RemoteProc
- 3.6.3.2. RPMsg
- 3.6.3.3. PRU-ICSS Ethernet
- 3.6.3.4. PRU_ICSSG Ethernet
- 3.6.3.4.1. Introduction
- 3.6.3.4.2. Supported platforms
- 3.6.3.4.3. Features supported
- 3.6.3.4.4. Driver Configuration
- 3.6.3.4.5. Device tree bindings
- 3.6.3.4.6. User guide
- 3.6.3.4.7. XDP
- 3.6.3.4.8. Tips
- 3.6.3.4.9. CPSW / PRU Ethernet Selection
- 3.6.3.4.10. Time Senstive Network (TSN) Offload Support
- 3.6.3.4.11. SRAM Requirement
- 3.6.3.5. PRU-ICSS Soft UART
- 3.6.3.6. PRU-ICSSG PWM
- 3.6.4. Firmware Development
- 3.6.5. Hardware
- 3.6.1. Overview of PRU Subsystem
- 3.7. IPC
- 3.7.1. Overview
- 3.7.2. IPC Quick Start Guide
- 3.7.3. IPC for AM57xx
- 3.7.4. IPC Early Boot for AM57xx/DRA7xx
- 3.7.5. IPC for AM65xx
- 3.7.6. IPC for K2x
- 3.7.6.1. Introduction
- 3.7.6.2. Software Dependencies to Get Started
- 3.7.6.3. Multiple Processor Manager
- 3.7.6.4. Getting Started with IPC Linux Examples
- 3.7.6.5. Understanding the Memory Map
- 3.7.6.6. Changing the DSP Memory Map
- 3.7.6.7. Modifying ex02_messageQ example to run from DDR
- 3.7.6.8. Loading DSP images from CCS (without using MPM)
- 3.7.6.9. MPM Debugging
- 3.7.6.10. Disable OpenCL Application
- 3.7.6.11. Frequently Asked Questions
- 3.7.7. Multiple Ways of ARM-DSP Communication
- 3.7.8. IPC Tests
- 3.7.9. IPC Daemon
- 3.8. CMEM
- 3.9. Graphics and Display
- 3.9.1. Introduction
- 3.9.2. Software Architecture
- 3.9.3. Graphics Demos
- 3.9.4. SGX Debug Info
- 3.9.5. AM3 Beagle Bone Black Board Configuration
- 3.9.6. Migration from prior releases
- 3.9.7. DSS Applications
- 3.9.8. SGX Build Guide
- 3.9.9. Display
- 3.9.10. OpenGL ES
- 3.9.11. QT Graphics Framework
- 3.9.12. GTK+ Graphics Framework
- 3.9.13. Weston
- 3.9.14. PowerVR Tools
- 3.10. Multimedia
- 3.11. OpenCL
- 3.12. OpenCV
- 3.12.1. Introduction
- 3.12.2. OpenCV Modules Supported By TI
- 3.12.3. OpenCL offload
- 3.12.4. Unit Tests
- 3.12.5. Necessary steps to modify OpenCV framework to add more OpenCL Host side and DSP C66 optimized kernels
- 3.12.5.1. Supported Platforms
- 3.12.5.2. OpenCV OpenCL run-time setup
- 3.12.5.3. OpenCV OpenCL development setup
- 3.12.5.4. OpenCV OpenCL related framework details: how to add new DSP kernel
- 3.12.5.5. Creating OpenCL C kernel optimized for C66 core
- 3.12.5.6. OpenCV OpenCL kernels implemented specifically for DSP C66 core
- 3.12.5.7. List of currently (SDK 3.1) DSP optimized OpenCV OpenCL kernels, using non-standard OpenCL extensions
- 3.12.5.8. Profiling results of DSP optimized OpenCV OpenCL kernels (SDK 3.1), AM5728 platform
- 3.12.5.9. Alternative approach to add new OpenCL kernels at OpenCV application level
- 3.12.5.10. OpenCV profiling - standard procedure
- 3.12.6. OpenCV Performance
- 3.12.7. Frequently Asked Questions
- 3.13. OpenVX
- 3.14. Virtualization
- 3.15. Machine Learning
- 3.15.1. TI Deep Learning (TIDL)
- 3.15.1.1. Introduction
- 3.15.1.2. Verified networks topologies
- 3.15.1.3. Examples and Demos
- 3.15.1.4. Developer’s guide
- 3.15.1.4.1. Software Stack
- 3.15.1.4.2. Additional public TI resources
- 3.15.1.4.3. Introduction to Programming Model
- 3.15.1.4.4. Target file-system
- 3.15.1.4.5. Input data format
- 3.15.1.4.6. Output data format
- 3.15.1.4.7. Import Process
- 3.15.1.4.8. Verifying TIDL inference result
- 3.15.1.4.9. Parameters controling dynamic quantization
- 3.15.1.4.10. Importing Tensorflow Models
- 3.15.1.4.11. Importing Caffe Models
- 3.15.1.4.12. Viewer tool
- 3.15.1.4.13. Simulation Tool
- 3.15.1.4.14. Summary of model porting steps
- 3.15.1.5. Compatibility of trained model formats
- 3.15.1.6. Training
- 3.15.1.7. Performance data
- 3.15.1.8. Multi core performance (EVE and DSP cores only)
- 3.15.1.9. Troubleshooting
- 3.15.2. Neo-AI Deep Learning Runtime
- 3.15.3. TVM Runtime
- 3.15.4. TensorFlow Lite
- 3.15.5. Arm NN and Arm Compute Library
- 3.15.1. TI Deep Learning (TIDL)
- 3.16. ARM Trusted Firmware-A
- 3.17. OP-TEE